The newly merged 2022 IEEE VLSI Symposium on Technology & Circuits is organized around the theme: “Technology & Circuits for the Critical Infrastructure of the Future.”. It will be held in Honolulu (Hawai) as an hybrid event from 12 to 17 June 2022.
Within the frame of StorAIge, Fraunhofer-IPMS and XFAB will present their work on “Memory Array Demonstration of fully integrated 1T-1C FeFET concept with separated ferroelectric MFM device in interconnect layer”. K. Seidel et al.
Abstract: In our work we describe and demonstrate an alternative approach of integrating 1T-1C FeFET having separated transistor (1T) without modifying frontend CMOS technology and an additional gate-coupled ferroelectric (FE) capacitor (1C) embedded in the interconnect layers. Starting from the results of FE capacitor integration and 1T-1C single cell characterization this paper describes realization and results of a fully integrated 8 kbit memory array implementation.
More information : https://www.vlsisymposium.org/
