On 10th and 11th October 2023, the second year review meeting of StorAige was held at STMicroelectronics in Crolles near Grenoble (France).
Numerous results reflecting the project’s ongoing progress were presented to the KDT/Chips Joint Undertaking:
- finalized specifications for the various demonstrators
- numerous functional blocks developed and tested.
- analysis of the first silicon for silicon technologies
- progress in the industrialisation of the 28nm FDSOI ePCM technology
- freezing of the process flow and realisation of qualification test chips for the development of the next technology node in 18nm ePCM
- tape-out of ‘Proof of Concept’ chips and memory stack manufacturing for OxRAM and FeRAM as well as AI dedicated architecture
- tape out of prototypes and powerful MCU dedicated to AI
- numerous activities concerning materials characterization, stacks and advanced processing steps conducted in the different associated labs and fabs.
- Start of qualification for some of the chip demonstrators developed within the project
- live demonstrators…
Numerous communication and dissemination activities illustrating the consortium’s productivity and involvement were also produced during this second year! To date over 55 scientific papers were published!
Next steps will focus of finalising the activities, disseminating the results and assessing the exploitation and the Impact of the project.